\ Contents: Square-root for ARM processors
\	u1 -- 32-bit unsigned
\	n  -- significant digits
\	      16 -> sqrt-integer
\	      32 -> fractional integer 16/16bits
only forth also definitions
code (sqrt	\ ( u1 n -- u2 )
	r0	sp	pop
	r1	0 #	mov
	r2	0 #	mov
	begin	r3	r1	mov
		r0	r0	1 #lsl s mov
		r2	r2	r2 adc
		r0	r0	1 #lsl s mov
		r2	r2	r2 adc
		r1	r1	2 #lsl mov
		r1	1	incr
		r2	r2	r1 s sub	\ get C-flag
		r2	r2	r1 lt add
		r1	r3	1 #lsl mov
		r1	r1	1 # ge orr	\ bit0 = not-C
		top	1	s decr
	eq until
		top	r1	mov c;

: sqrt		( u1 -- u2 )	d# 16 (sqrt ;


code dsqrt	\ ( du1 -- u2 )		\ u1, u2 are in top
	r5	sp		pop		\ top high-part; r5 low-part
	r1      0 #     	mov
	r2      0 #     	mov
	r0      32 #    	mov		\ significant digits
 begin	r3      r1      	mov
	top	top	1 #lsl	s mov
	r2      r2      r2	adc
	r5	r5	1 #lsl	s mov
	top	top	0 #	adc
	top	top	1 #lsl	s mov
	r2      r2      r2	adc
	r5	r5	1 #lsl	s mov
	top	top	0 #	adc
	r1      r1      2 #lsl	mov
	r1      	1       incr
	r2      r2      r1	s sub        \ get C-flag
	r2      r2      r1	lt add
	r1      r3      1 #lsl	mov
	r1      r1      1 #	ge orr      \ bit0 = not-C
	r0		1	s decr
 eq until
	top     r1      	mov c;
